By Gabriele Manganaro
Have to wake up to hurry fast at the most recent advances in excessive functionality information converters? wish aid identifying the simplest structure on your software? With every thing you want to learn about the foremost new converter architectures, this advisor is for you. It provides uncomplicated ideas, circuit and method layout innovations and linked trade-offs, taking out long mathematical proofs and offering intuitive descriptions in advance. every thing from time-to-digital converters to comparator-based/zero-crossing ADCs is roofed and every subject is brought with a quick precis of the basic fundamentals. sensible examples describing real chips, in addition to wide comparability among architectural or circuit ideas, ease structure choice and assist you lower layout time and engineering probability. Trade-offs, benefits and downsides of every choice are placed into standpoint with a dialogue of destiny tendencies, displaying the place this box is heading, what's riding it and what crucial unanswered questions are
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Extra info for Advanced Data Converters
A diagonal dashed line cutting through the BW–SNDR space outlines a practical border line on the present state of the art in terms of ADC performance. The region below it represents what it is at present feasible to design, while hitting specifications above the dashed line is increasingly non-trivial or simply not yet feasible. 17) and we plot its contour lines (assuming that the normalized full-scale amplitude is A = 1 V) in the chart of Fig. 9 for decreasing values of σj , these correspond to diagonal lines, parallel to the dashed line, gradually going further and further away from the origin.
At high frequency, even small parasitics affect the linearity and the intrinsically low complexity does not allow for many effective ways to compensate for the impairments and continue to sustain the performance. In DACs, analogously to their ADC counterparts, feedback (noise-shaping) and oversampling combine to provide high linearity and dynamic range but for rather small output frequencies, although in most DACs (even when using multi-bit architectures) the analog part of the converter is rather simple and somewhat reminiscent of some of the building blocks used in current-steering DACs.
3, it is hard to choose which metrics can be more encompassing for such a broad space of cases. A somewhat arbitrary choice has then been made in the chart shown in Fig. 10, where, similarly to what was done for the ADCs, many classic DAC architectures have been mapped into the BW–SFDR plane. It should also be remarked that the extent of the overlap between some of these architectures is, in actuality, greater than what is depicted. 34 A refresher on the basics Even though distortion (characterized by the SFDR in Fig.